Digital Logic Design Videos, PPTs, lecture notes, assignments, question papers for jntuk, jntuh, jntua, vtu, bput, kiit, vit, anna universities
Digital Logic Design free videos and free material uploaded by Ramanjaneyulu K .
OBJECTIVE:
- To introduce the basic tools for design with combinational and sequential digital logic and state machines.
- To learn simple digital circuits in preparation for computer engineering.
UNIT- I:
Digital Systems and Binary Numbers; Digital Systems, Binary Numbers, Binary Numbers, Octal and Hexadecimal Numbers, Complements of Numbers, Complements of Numbers, Signed Binary Numbers,Arithmetic addition and subtraction
UNIT -II:
Concept of Boolean algebra: Basic Theorems and Properties of Boolean algebra, Boolean Functions, Canonical and Standard Forms, Minterms and Maxterms,
Unit -III:
Gate level minimization : Map Method, Two-Variable K-Map, Three-Variable K-Map, Four Variable K-Maps. Products of Sum Simplification, Sum of Products Simplification, Don’t – Care Conditions, NAND and NOR Implementation, Exclusive‐OR Function
UNIT- IV:
Combinational Logic: Introduction, Analysis Procedure, Design Procedure, Binary Adder–Subtractor, Decimal Adder, Binary Multiplier, Decoders, Encoders, Multiplexers, HDL Models of Combinational Circuits
Unit- V:
Synchronous sequential logic: Introduction to Sequential Circuits, Storage Elements: Latches, Storage Elements: Flip‐Flops, Analysis of Clocked Sequential Circuits, Mealy and Moore Models of Finite State Machines
Unit-VI:
Registers and counters : Registers, Shift Registers, Ripple Counters, Synchronous Counters, Ring Counter, Johnson Counter, Ripple Counter
Outcomes:
A student who successfully fulfills the course requirements will have demonstrated:
<!--[if !supportLists]-->· An ability to define different number systems, binary addition and subtraction, 2’s complement representation and operations with this representation.
<!--[if !supportLists]-->· An ability to understand the different switching algebra theorems and apply them for logic functions.
<!--[if !supportLists]-->· An ability to define the Karnaugh map for a few variables and perform an algorithmic reduction of logic functions.
<!--[if !supportLists]-->· An ability to define the other minimization methods for any number of variables Variable Entered Mapping (VEM) and Quine-MeCluskey (QM) Techniques and perform an algorithmic reduction of logic functions.
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