Verilog HDL

1:Introduction to Verilog HDL

Lecture 1Setting Expectations - Course Agenda

Lecture 2Introduction to Verilog HDL

Quiz 1Knowledge Check - Introduction to Verilog HDL

2:Verilog HDL Reference Material

Lecture 3Verilog HDL Reference Book

Lecture 4Verilog HDL - Quick Reference Guide

3:Data Types

Lecture 5Data Types

Quiz 2Knowledge Check - Data Types

4:Verilog Operators

Lecture 6Verilog Operators

Quiz 3Knowledge Check - Verilog Operators

5:Verilog for Verification

Lecture 7Verilog for Verification

Quiz 4Knowledge Check - Verilog for Verification

6:Assignments

Lecture 8Assignments

Quiz 5Knowledge Check - Assignments

7:Structured Proceedures

Lecture 9Structured Procedures

Quiz 6Knowledge Check - Structured Procedures

8:Synthesis Coding Styles

Lecture 10Synthesis Coding Style

Quiz 7Knowledge Check - Synthesis Coding Style

9:Finite State Machine

Lecture 11Finite State Machine

Quiz 8Knowledge Check - Finite State Machine

10:Compiler Directive

Lecture 12Compiler Directive

11:Summary

Lecture 13Verilog HDL Summary

Lecture 14Verilog RTL Coding Examples

12:Verilog Labs

Lecture 15Verilog Lab Manual

Lecture 16Solution to Verilog Lab 01

Lecture 17Solution to Verilog Lab 02

Lecture 18Solution to Verilog Lab 03

Lecture 19Solution to Verilog Lab 04

Lecture 20Solution to Verilog Lab 05

Lecture 21Solution to Verilog Lab 06

13:Advanced Verilog Reference Book

Lecture 22Advanced Verilog - Reference Book

14:Advanced Verilog

Lecture 23Timescale system task & localparm

Lecture 24Generate block & Continuous Procedural Assignments

Quiz 9Advanced Verilog - Knowledge Check - 1

Lecture 25Self checking testbench and Automatic Tasks

Lecture 26Named Events and Stratified Event Queue

Quiz 10Advanced Verilog - Knowledge Check - 2

15:Code Coverage - Reference Book

Lecture 27Code Coverage Reference Book

16:Code Coverage

Lecture 28Definition of Code Coverage

Lecture 29Statement and branch coverage

Lecture 30Condition & Expression Coverage

Lecture 31Toggle & FSM Coverage

Quiz 11Code Coverage - Knowledge Check

Lecture 32Questasim commands for Code Coverage

Lecture 33Makefile for Simulations

17:Advanced Verilog & code Coverage - Labs

Lecture 34Advanced Verilog & Code Coverage Lab Manual

Lecture 35Advanced Verilog Lab Solutions (Lab 1 & 2)

Lecture 36Code Coverage Lab Solutions (Lab 3, 4 & 5)

18:Verilog - Module Test

Quiz 12Verilog HDL - Module Test

Quiz 13Verilog HDL - Practical Test