8051 Flag Bits and PSW Register

8051 Flag Bits and PSW Register

Used to indicate the Arithmetic condition of ACC.

Flag register in 8051 is called as program status word (PSW). This special function register PSW is also bit addressable and 8 bit wide means each bit can be set or reset independently.

There are four flags in 8051

P → Parity flag → PSW 0.0

1 – odd number of 1 in ACC

0 – even number of 1 in ACC

OV(PSW 0.2) → overflow flag → this is used to detect error in signed arithmetic operation. This is similar to carry flag but difference is only that carry flag is used for unsigned operation.

RS1(PSW0.4)          RS0(PSW0.3) Register Bank Select

<!--[if !supportLists]-->0                                                          <!--[endif]-->0   Bank 0

<!--[if !supportLists]-->0                                                          <!--[endif]-->1   Bank 1

<!--[if !supportLists]-->1                                                          <!--[endif]-->0   Bank 2

<!--[if !supportLists]-->1                                                          <!--[endif]-->1   Bank 3

for selecting Bank 1, we use following commands

SETB PSW0.3 (means RS0=1)

CLR PSW0.4 (means RS1=0)

Initially by default always Bank 0 is selected.

F0 → user definable bit

AC → Auxiliary carry flag → when carry is generated from D3 to D4, it is set to 1, it is used in BCD arithmetic.

CY → carry flag → Affected after 8 bit addition and subtraction. It is used to detect error in unsigned arithmetic operations. We can also use it as single bit storage.

Structure of RAM or 8051 Register Bank and Stack

128 byte RAM is available in 8051

128 byte = 2⁷B

Address range of RAM is 00H to 7FH.

In MC8051, 128 byte visible or user accessible RAM is available which is shown in figure. Extra 128B RAM which is not user accessible. 80H to

FFH used for storage of SFR (special function register)

Four Register Banks

There are four register banks, in each register bank there are eight 8 bit register available from R0 to R7 → By default Bank 0 is selected.

For Bank 0, R0 has address 00H

R1 has address 01H

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R7 has address 07H

For Bank 1, R0 has address 08H

R1 has address 09H

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R7 has address 0FH

For selecting banks we use RS0 and RS1 bit of PSW. → R0 to R7 registers are byte addressable means.

 If we want to set the bit 3 of R0 then we can’t use SETB R0.3  We use MOV R0, #08H;

 For changing single bit we can modify all the other bits of R0.

Locations 20H to 2FH is bit addressable RAM means each bit from 00H to FFH in this we can set or reset CF rather than changing whole byte.

Locations 30H to 7FH is used as scratch pad means we can use this space for data reading and writing or for data storage.