Digital Signal Processing

OBJECTIVES:

The student will be able to

• Analyze the Discrete Time Signals and Systems

• Know the importance of FFT algorithm for computation of Discrete Fourier Transform

• Understand the various implementations of digital filter structures

• Learn the FIR and IIR Filter design procedures

• Know the need of Multirate Processing

• Learn the concepts of DSP Processors

UNIT I

INTRODUCTION: Introduction to Digital Signal Processing: Discrete time signals & sequences, Classification of Discrete time systems , stability of LTI systems, Invertability, Response of LTI systems to arbitrary inputs. Solution of Linear constant coefficient difference equations. Frequency domain representation of discrete time signals and systems. Review of Z-transforms, solution of difference equations using Z-transforms, System function.

UNIT II

DISCRETE FOURIER SERIES & FOURIER TRANSFORMS: Properties of discrete Fourier series, DFS representation of periodic sequences, Discrete Fourier transforms: Properties of DFT, linear filtering methods based on DFT, Fast Fourier transforms (FFT) - Radix-2 decimation in time and decimation in frequency FFT Algorithms, Inverse FFT.

UNIT III:

DESIGN OF IIR DIGITAL FILTERS& REALIZATIONS: Analog filter approximations – Butter worth and Chebyshev, Design of IIR Digital filters from analog filters, Design Examples, Analog and Digital frequency transformations. Basic structures of IIR systems, Transposed forms.

UNIT IV

DESIGN OF FIR DIGITAL FILTERS & REALIZATIONS: Characteristics of FIR Digital Filters, frequency response. Design of FIR Digital Filters using Window Techniques and Frequency Sampling technique, Comparison of IIR & FIR filters. Basic structures of FIR systems, Lattice structures, Lattice-ladder structures

UNIT V

MULTIRATE DIGITAL SIGNAL PROCESSING: Introduction, Decimation , Interpolation Sampling rate conversion ,Implementation of sampling rate converters, Applications – Sub-band Coding of Speech Signals ,Implementation of Digital Filter Banks, Trans-multiplexers.

UNIT VI

INTRODUCTION TO DSP PROCESSORS: Introduction to programmable DSPs: Multiplier and Multiplier Accumulator, Modified bus structures and memory access schemes in P-DSPs ,Multiple Access Memory, Multiported memory, VLIW architecture, Pipelining, Special addressing modes, On-Chip Peripherals. Architecture of TMS320C5X: Introduction, Bus Structure, Central Arithmetic Logic Unit, Auxiliary Register ALU, Index Register, Block Move Address Register, Parallel Logic Unit, Memory mapped registers, program controller, some flags in the status registers, On- chip memory, On-chip peripherals.