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- Identify flaws and limitations in simple systems implemented using the static discipline (noise assumptions, etc).
- Identify flaws and limitations in simple systems implemented using clocked registers with asynchronous inputs (metastability issues).
- Identify flaws and limitations in simple systems implemented using pipelined processors (pipeline hazards).
- Identify flaws and limitations in simple systems implemented using semaphores for process synchronization (deadlocks).
- Identify flaws and limitations in simple systems implemented using shared-memory multiprocessors (sequential inconsistency).
- Characterize the logic function of combinational devices using CMOS, ROM, or PLA technologies.
- Explain synthesis issues for combinational devices using CMOS, ROM, or PLA technologies from their functional specification.
- Explain synthesis of acyclic circuits from combinational components.
- Calculate performance characteristics of acyclic circuits with combinational components.
- Explain and calculate performance characteristics of single-clock sequential circuits.
- Design, debug, and test combinational circuits of the complexity of an arithmetic logic unit.
- Design, debug, and test a controller for a finite-state machine.
- Pipeline a combinational circuit for improved throughput.
- Understand issues affecting microprocessor instruction set design.
- Complete and debug the design of a simple CPU with a given RISC-based intruction set.
- Measure the memory access performance of a processor, and tune cache design parameters to improve performance.
- Analyze the operation of page-based virtual memory systems.
- Translate simple programs from C to machine language.
- Deduce processor state from a memory snapshot during execution.
This course introduces architecture of digital systems, emphasizing structural principles common to a wide range of technologies. It covers the topics including multilevel implementation strategies, definition of new primitives (e.g., gates, instructions, procedures, processes) and their mechanization using lower-level elements. It also includes analysis of potential concurrency, precedence constraints and performance measures, pipelined and multidimensional systems, instruction set design issues and architectural support for contemporary software structures.
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