Hardware modeling using verilog free videos and free material uploaded by Indian Institute of Technology, Kharagpur (IIT Kharagpur). This session contains about Hardware modeling using verilog Updated syllabus , Lecture notes , videos , MCQ , Privious Question papers and Toppers Training Provided Training of this course. If Material not uploaded check another subject
Week 1: Introduction to digital circuit design flow (3 hours)
Week 2: Verilog variables, operators and language constructs (2 hours)
Week 3: Modeling combinational circuits using Verilog (2 hours)
Week 4: Modeling sequential circuits using Verilog (3 hours)
Week 5: Verilog test benches and design simulation (2 hours)
Week 6: Behavioral versus structural design modeling (2 hours)
Week 7: Miscellaneous modeling issues: pipelining, memory, etc. (2 hours)
Week 8: Processor design using Verilog (4 hours)
The course will introduce the participants to the Verilog hardware description language. It will help them to learn various digital circuit modeling issues using Verilog, writing test benches, and some case studies.INTENDED AUDIENCE: Computer Science and Engineering Electronics and Communication Engineering Electrical EngineeringPRE-REQUISITES: Basic concepts in digital circuit design. Familiarity with a programming language like C or C++.INDUSTRY SUPPORT: Intel, Cadence, Mentor Graphics, Synopsys, Xilinx.
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